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Dual RF LDMOS Bias Controllers
with I 2 C/SPI Interface
ELECTRICAL CHARACTERISTICS (continued)
(GATEV DD = +5.5V for the MAX1385, GATEV DD = +11V for the MAX1386, AV DD = DV DD = +5V, external V REFADC = +2.5V, external V REF-
DAC = +2.5V, C REF = 0.1μF, unless otherwise noted. T A = -40°C to +85°C, unless otherwise noted. Typical values are at T A = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Av PGA = 2
900
Sense-Amplifier Bandwidth
Av PGA = 10
Av PGA = 25
720
290
kHz
LDMOS GATE DRIVER (GAIN = 2 and 4)
I GATE = ±1mA
0.75
GATEV DD
- 0.75
Output Gate-Drive Voltage Range
Output Impedance
V GATE Settling Time
Output Capacitive Load (Note 1)
V GATE Noise
V GATE
R GATE
t GATE
C GATE
I GATE = ±10mA
Measured at DC
Settles to within ±0.5% of final value;
R SERIES = 50 ? , C GATE = 15μF
No series resistance, R SERIES = 0 ?
R SERIES = 50 ?
RMS noise; 1kHz - 1MHz
1
0
0
0.1
10
250
GATEV DD
-1
10
25,000
V
?
ms
nF
nV/ √ Hz
Maximum Power-On Transient
±100
mV
Output Short-Circuit Current Limit
Total Unadjusted Error
No Autocalibration and Offset
Removal (Note 2)
Total Adjusted Error
With Autocalibration and Offset
Removal
Drift
Clamp to Zero Delay
I SC
TUE
TUE
1s, sinking or sourcing
MAX1385, LOCODE = 128, HICODE = 180
MAX1386, LOCODE = 128, HICODE = 180
MAX1385, LOCODE = 128, HICODE = 180
MAX1386, LOCODE = 128, HICODE = 180
MAX1385, V GATE > 1V
MAX1386, V GATE > 1V
±25
±6
±12
±1
±2
±15
±30
1
±20
±40
±8
±16
mA
mV
mV
μV/°C
μs
Output Safe Switch On-
Resistance
Amplifier Bandwidth
Amplifier Slew Rate
R OPSW
GATE_ clamped to AGND (Note 3)
MAX1385
MAX1386
300
150
0.375
500
?
kHz
V/μs
MONITOR ADC DC ACCURACY
Resolution
N ADC
12
Bits
Differential Nonlinearity
DNL ADC
±0.5
±2
LSB
Integral Nonlinearity
Offset Error
Gain Error
INL ADC
(Note 4)
(Note 5)
±0.6
±2
±2
±2
±4
±4
LSB
LSB
LSB
Gain Temperature Coefficient
Offset Temperature Coefficient
±0.4
±0.4
ppm/°C
ppm/°C
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3
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